IDT79R3041-20J

IDT79R3041-20J, high-performance 32-bit microprocessor, PLCC84, 32Bit, 5V, 25MHz

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Price:: US $4.70~5.00 / piece [Get Latest Price]

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PartNumber:: IDT79R3041-20J

Brand:: Integrated Device Technology - IDT | Pack: PLCC | D/C: 00+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2012-08-25

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Part Number:IDT79R3041-20J
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Product Summary

The IDT IDT79R3041-20J is a high-performance 32-bit microprocessor featuring a high-level of integration, and targeted to high-performance but cost sensitive processing applications. The IDT79R3041-20J is designed to bring the highperformance inherent in the MIPS RISC architecture into low-cost, simplified, power sensitive applications. Thus, functional units have been integrated onto the CPU core in order to reduce the total system cost, rather than to increase the inherent performance of the integer engine. Nevertheless, the IDT79R3041-20J is able to offer 43VUPS performance at 50MHz without requiring external SRAM or caches.

Parametrics

IDT79R3041-20J absolute maximum ratings: (1)Terminal Voltage with Respect to GND, VTERM: -0.5 to +7.0V(for commercial), -0.5 to +7.0V(for Military); (2)Operating Case Temperature, TC: 0 to +85℃(for commercial), -55 to +125℃(for Military); (3)Case Temperature Under Bias, TBIAS: -55 to +125℃; (4)Storage Temperature, TSTG: -55 to +125℃; (5)Input Voltage, VIN: -0.5 to +7.0(for commercial).

Features

IDT79R3041-20J features: (1)Instruction set compatible with IDT79R3000A, and RISC CPUs; (2)High level of integration minimizes system cost; (3)2KB of Instruction Cache; (4)Flexible bus interface allows simple, low cost designs; (5)Optional 1x or 2x clock input; (6)16.67 through 33MHz operation; (7)V version operates at 3.3V; (8)50MHz at 1x clock input and 1/2 bus frequency only; (9)Large on-chip caches with user configurability; (10)Low cost 84-pin packaging; (11)Superset pin- and software-compatible with R3051, R3071; (12)Multiplexed bus interface with support for low-cost, lowspeed memory systems with a high-speed CPU; (13)On-chip 4-deep write buffer eliminates memory write stalls; (14)On-chip 4-deep read buffer supports burst or simple block reads; (15)On-chip DMA arbiter.